1. Field of the Invention
The present invention generally relates to methods of device isolation using a polysilicon pad LOCOS method, and more particularly, to an improved polysilicon pad LOCOS method which allows a field oxide film to be increased in thickness without forming any hole in the surface of a semiconductor substrate.
2. Description of the Background Art
The LOCOS method developed by Philips Company Incorporated is well-known as a method for forming a field oxide film which isolates device regions on a main surface of a semiconductor substrate. According to this method, however, a bird's beak whose length is substantially equal to the film thickness of the field oxide film is formed, and this has given limitations in manufacturing a device of a high-integration level. Therefore, an improved polysilicon pad LOCOS method as shown in FIGS. 2A to 2F has been proposed (U.S. Pat. No. 4,407,696).
First, the conventional polysilicon pad LOCOS method will be briefly described. Referring to FIG. 2A, an underlying oxide film 2 is formed on a main surface of a semiconductor substrate 1. Polysilicon 3 is deposited over the underlying oxide film 2 so as to be a field oxide film, on which a nitride film 4 (Si.sub.3 N.sub.4) is formed. Furthermore, a resist 5 is formed on the nitride film 4.
Secondly, referring to FIG. 2B, the resist 5 is patterned by the lithography method to leave patterns of a predetermined configuration in an area to be a device region. Subsequently, using this patterned resist 5 as a mask, the nitride film 4 is patterned by the reactive ion etching method to leave patterns of a predetermined configuration in the area to be a device region.
Furthermore, referring to FIG. 2C, using the patterned nitride film 4 as a mask, the polysilicon is thermally oxidized except a portion beneath the mask, forming a field oxide film 6 on the main surface of the semiconductor substrate 1.
Referring to FIGS. 2C and 2D, the nitride film 4 which has served as the mask is eliminated to expose the unoxidized polysilicon 3 remaining beneath the mask.
Referring to FIG. 2E, the unoxidized polysilicon 3 is etched away by plasma etching to expose the underlying oxide film 2 surrounded by the field oxide film 6.
Finally, referring to FIG. 2F, the underlying oxide film 2 surrounded by the field oxide film 6 is etched off by a hydrofluoric acid solution.
By adopting this process, the field oxide film 6 is formed with bird's beaks shortened in length. In the device region isolated by such a field oxide film 6, for example, an NMOS, an EEPROM and the like are formed.
FIGS. 3A to 3B show a process for forming an NMOS in a device region.
Referring to FIG. 3A, an oxide film 7 is formed on a main surface of a semiconductor substrate 1 to be a gate oxide film. Polysilicon 8 is then deposited over the entire surface of the semiconductor substrate 1 to form a gate.
Subsequently, referring to FIG. 3B, the polysilicon 8 and the oxide film 7 are patterned to form a gate electrode 9 and a gate oxide film 10.
Furthermore, referring to FIG. 3C, n.sup.+ impurity ions 30 are implanted in the entire surface in a self-aligned manner to form source/drain regions 11 in the main surface of the semiconductor substrate 1.
Referring to FIG. 3D, an interlayer insulating film 12 is formed over the entire surface of the semiconductor substrate 1. Subsequently, contact holes are formed in this interlayer insulating film 12 to expose contact portions for the source/drain regions 11. An aluminum interconnection layer 13 is then formed over the entire surface of the semiconductor substrate 1 including the contact holes. In this manner, the NMOS is formed in the device region. This NMOS has a switching function, since its source/drain regions 11 and 11 are electrically connected when a predetermined voltage is applied to the gate electrode 9. In this case, the thicker the field oxide film 6 is, the more improved break-down voltage can be expected in the NMOS.
Subsequently, a description will be made on a case where a memory cell of an EEPROM is formed in a device region.
FIG. 4 is a sectional view showing a structure of the memory cell in a conventional EEPROM.
There is formed a field oxide film (not shown in the drawing) on a main surface of a semiconductor substrate 1 formed of a P-type silicon substrate. N-type impurity regions 14, 15 and 16 are formed with predetermined spacings in a device region isolated by the field oxide film. Above an area between the impurity regions 14 and 15 there is formed a selective gate 18 of a selective transistor with an insulating film 17 interposed therebetween. Above the impurity region 15 there is formed a floating gate 20 of a memory transistor with a thin insulating film 19 interposed therebetween to be a tunnel oxide film. Furthermore, on the floating gate 20, there is formed a control gate 21 of the memory transistor with an insulating film 22 interposed therebetween. The selective gate 18, the floating gate 20 and the control gate 21 are all covered with an insulating film 24. The N-impurity region 14 to be a drain region of the selective transistor is connected to a bit line (not shown) while the N-type impurity region 16 to be a source region of the memory transistor is connected to a source line (not shown).
Now, operation of the memory cell will be described. In erasing, that is, in introducing electrons into the floating gate 20, a word line is selected and a high voltage is applied to the selective gate in order to select a cell. Subsequently, when the bit line and the source line are set to 0 V and a high voltage is applied to the control gate 21, electrons are introduced into the floating gate 20 from the drain 15 through the tunnel oxide film 19.
In writing, that is, in extracting the electrons from the floating gate 20, a word line is selected and a high voltage is applied to the selective gate in order to select a cell. Subsequently, with the source line floating, when the control gate 21 is set to 0 V and a high voltage is applied to the bit line, the electrons in the floating gate 20 are extracted into the drain 15 through the tunnel oxide film 19.
In reading, a word line is selected and a high voltage is applied to the selective gate in order to select a cell. Subsequently, the source line is set to 0 V, a positive voltage is applied to the bit line and a bias voltage for reading is applied to the control gate 21. Since the drain current varies depending on the presence or absence of stored charges in the floating gate 20, stored information of "1" or "0" is read out by sensing the variation.
The conventional EEPROM is constituted as described above. Meanwhile, since in the EEPROM the writing voltage is large, it is required for the field oxide film which isolates devices to be increased in thickness. A more than 6000 .ANG. thickness is presently required for the field oxide film.
The experimental facts on which the present invention is based will be described hereinafter.
FIGS. 5A to 5D are diagrams showing results of an experiment where a thickness of a field oxide film is 6000 .ANG. and that of a silicon nitride film is 1500 .ANG..
Referring to FIG. 5A, using a patterned nitride film as a mask, polysilicon other than a portion beneath the mask was thermally oxidized to form a field oxide film 6 on a main surface of a semiconductor substrate 1. At this stage, there appeared horn-like protrusions 6a extending inwardly at ends of the field oxide film 6.
Referring to FIG. 5B, the nitride film 4 having served as the mask was removed to expose the unoxidized polysilicon 3 remaining beneath the mask. At this stage, the horn-like protrusions 6a remained left. If an EEPROM or the like is formed in the device region with such protrusions 6a remaining, there arises a problem that electrode material and the like under the protrusions 6a cannot be removed. Therefore, these protrusions 6a were removed with hydrofluoric acid solution.
FIG. 5C is a diagram showing the field oxide film after the protrusions 6a were removed with hydrofluoric acid solution.
Furthermore, referring to FIGS. 5C and 5D, the unoxidized polysilicon 3 was removed by plasma etching.
Referring to FIG. 5D, an underlying oxide film 2 surrounded by the field oxide film 6 was removed with hydrofluoric acid solution. It was recognized that holes 23 had been opened in the main surface of the semiconductor substrate 1 as shown in FIG. 5D.
Such holes 23 have proven to considerably deteriorate characteristics of an NMOS or the like which may be formed in this device region.
In the following, reasons why the holes 23 were formed in the device region will be fully discussed. FIGS. 6A to 6E are diagrams clearly showing the facts which have been found as a result of investigation of the causes that the holes are formed in a surface of a semiconductor substrate 1.
Referring to FIG. 6A, using a patterned nitride film 4 as a mask, polysilicon other than a portion beneath the mask is thermally oxidized to form a field oxide film 6 on a main surface of a semiconductor substrate 1. At this stage, the unoxidized polysilicon 3 gets distorted under the influence of cubical expansion of the field oxide film 6 and thermal stress of the nitride film 4. This distortion causes formation of holes 3a, which pass through the unoxidized polysilicon 3, to reach the underlying oxide film 2.
Referring to FIG. 6B, the nitride film 4 having served as a mask is removed to expose the unoxidized polysilicon 3 remaining beneath the mask. Subsequently, when horn-like protrusions 6a are removed with hydrofluoric acid solution, the hydrofluoric acid solution reaches even to the underlying oxide film 2 through the holes 3a. Consequently, as shown in FIG. 6C, openings 2a are formed in the underlying oxide film 2.
Referring to FIG. 6D, when plasma etching is performed to remove the unoxidized polysilicon 3, the etching gas passes through the openings 2a in the underlying oxide film 2 and the main surface in the device region of the semiconductor substrate 1 is also etched.
Furthermore, referring to FIGS. 6D and 6E, removal of the underlying oxide film surrounded by the field oxide film 6 with the use of hydrofluoric acid solution was carried out. As a result, the semiconductor substrate 1 having the holes 23 opened in the main surface of the device region is obtained.
A number of such holes 23 have also proven to appear in the vicinity of edges 6a of the field oxide film 6 as seen in FIG. 7 (a plan view of FIG. 5D).
FIG. 8 is a diagram showing the results of a test as to whether holes have been produced in a device region, using a variety of thickness of the field oxide film which has been obtained by diversifying the thickness of the silicon nitride film. As will be apparent from the diagram, while an ideal field oxide film with bird's beaks reduced in length could be obtained if the field oxide film was thickened to 6000 .ANG. or more by making the silicon nitride film 1500 .ANG. thick or more, there was also recognized formation of the holes in the main surface of the semiconductor substrate. Meanwhile, in the case of a 500 .ANG. thick silicon nitride film and a 8000 .ANG. thick field oxide film, the formation of holes were not recognized, but the bird's beaks were increased in length so that the resultant device was useless.